A telecommunication network power system usually includes an ac/dc stage converting the power from the ac utility line to a 48V dc distribution bus and a dc/dc stage converting the 48V dc distribution bus to a plurality of voltage levels for all types of telecommunication loads. Both stages may comprise isolated dc/dc converters. Isolated dc/dc converters can be implemented by using different power topologies, such as flyback converters, forward converters, half bridge converters, full bridge converters and the like. As known in the art, bridge converters generally are employed when the power of a dc/dc converter is more than 100 watts.
As shown in FIG. 1, a full bridge converter 100 is a conventional full bridge converter having a full wave rectifier coupled to a center-tapped secondary winding. The full bridge converter 100 includes four switches Q1, Q2, Q3 and Q4 at a primary side of a transformer Tx. The four switches Q1, Q2, Q3 and Q4 form a bridge having two legs. Q1 and Q3 in series connection have a junction point, referred to as A. Q2 and Q4 in series connection have a junction point, referred to as B. The primary winding of the transformer Tx is connected to A and B. A dc supply Vin is connected to the two legs to provide power to the full bridge converter 100. According to the operating principle of a hard switching full bridge converter, the switches Q1 and Q4 are turned on simultaneously for an adjustable time during a first half cycle. After a period of dead time, the switches Q2 and Q3 are turned on simultaneously for an equal time during the second half cycle. As a result, Vin and −Vin are applied to the primary side of the transformer Tx in alternate half periods.
In a fixed duty cycle control scheme, the turn-on time of the switches Q1 and Q4 is equal to the turn-on time of the switches Q2 and Q3. When all four switches are turned off, both S1 and S2 are turned on. The load current flows through S1 and S2. This interval is referred to as a freewheeling period. The output voltage of the bridge converter 100 is proportional to the turn-on time of the switches. A controller (not shown) may detect the output voltage Vo and adjust the turn-on time via a negative feedback control loop (not shown). The secondary side of the transformer Tx is center-tapped. Such a center-tapped secondary and two switches S1 and S2 can form a full wave rectifier, which can convert the primary voltage having double polarities (Vin and −Vin) of the transformer Tx to a secondary voltage having a single polarity. Then, the secondary voltage having a single polarity is fed to an output filter including an inductor Lo and an output capacitor Co. The output filter averages the square voltage pulses at the output of the full wave rectifier and generates a dc voltage at Vo, which is then supplied to a load represented by a resistor RL.
A phase shift full bridge converter is capable of reducing switching losses by means of the zero voltage switching control technique. As shown in a dashed rectangle 120 of FIG. 1, instead of turning on two primary switches (e.g., Q1 and Q4) simultaneously, the turn-on time of these two switches are shifted by a period of time. More particularly, as depicted in the dashed rectangle 120, a waveform 1061 and a waveform 1101 show Q1 is on for a period of time before Q4 is turned on. There is an overlap between Q1's turn-on time and Q4's turn-on time. After Q1 is turned off, Q4 stays on for a period of time. Likewise, a waveform 1081 and a waveform 1121 show there is a phase shift between Q2 and Q3's turn-on time. A waveform 1021 shows the on-time of switches S2 and S3. A waveform 1041 shows the on-time of switches S1 and S4.
The phase shift full bridge can achieve a zero voltage switching by utilizing the L-C resonance between transformer leakage inductance and MOSFET (e.g., Q1) output capacitance. For example, Q3 has a parasitic capacitor (not shown) across its drain and source. During the period when both Q1 and Q4 are on, the voltage across Q3's parasitic capacitor is charged to a voltage approximately equal to Vin. According to the basic principle of the phase shift control technique, Q1 is off prior to Q4. After Q1 is off, the primary side current cannot change instantaneously. As a result, the primary side current will flow through the parasitic capacitors of Q1 and Q3. The flow of the primary side current through both parasitic capacitors may cause the voltage at the junction between Q1 and Q3 to be discharged to zero, enabling a zero voltage switching when Q3 is turned on without substantial power loss. Similarly, the phase shift operation may enable lossless turn-on of other switches, namely Q1, Q2 and Q4.